PROGRAMME

Tuesday 15 September: (Tower Seminar Room, STFC Daresbury Laboratory)

08:30 - 09:00 Registration
09:00 - 09:45 Introduction to CUDA
09:45 - 10:30 Introduction to NVIDIA Hardware for CUDA
10:30 - 11:00 Coffee Break
11:00 - 12:30 Getting Started with CUDA
12:30 - 13:15 Lunch Break
13:15 - 17:30 PGI Accelerator Compilers for x64+GPU Platforms

PGI Accelerator Compilers for x64+GPU Platforms

This tutorial provides an introduction to programming NVIDIA GPU's using the PGI Accelerator Programming Model in C and in Fortran. It is suitable for application programmers, in particular those who are not expert GPU programmers. This tutorial introduces the compute-specific details of the NVIDIA GPU and through examples, illustrates how to program common computational algorithms on the GPU. The material covers the programming language features, interpreting complier feedback, performance analysis, and performance tuning. The tutorial includes a live component with example demo's throughout, and a 1 hour self-guided tutorial designed to reinforce the presentation materials and provide insight into basic tuning of data movement and GPU kernel scheduling.

Wednesday 16 September: (Tower Seminar Room, STFC Daresbury Laboratory)

09:00 - 12:00 Focus on Additional Advanced CUDA Programming Topics
(Exact content to be determined on the first day)
12:00 - 13:00 Lunch
13:00 - 17:00 CAPS HMPP Workbench

HMPP™ Workbench includes a C and a Fortran compiler, hardware-specific code generators and a runtime that seamlessly integrate in your environment and make use of the hardware vendor development tools and drivers. It will help to design or port applications for the new hybrid architectures. The code generators are specifically designed to extract the most of data parallelism from C and Fortran kernels and translate them into the language of the targets such as NVIDIA® CUDA™, into an open file.